1. Field of the Invention
The present invention relates to direct memory access (DMA) data transfer operations and more particularly to DMA data transfer operations among a plurality of independent processors.
2. Description of the Prior Art
In computing systems and more particularly in word processing systems, it has heretofore been the practice to move data from one memory to another on a byte-by-byte basis. When more than one processor accesses data, one of the processors requests information from another one and receives such information one byte at a time. An alternative method to this byte-by-byte transfer has been a common memory, wherein one processor accesses a memory and writes data into it. A second processor can then read the data from the same common memory. It is possible in this latter system to use direct memory access to access data from or to the common memory.
Prior to the present invention, however, there has been no method for usng direct memory access to transfer data from one independent processor system to another. Moreover, direct memory access methods have been used primarily until now to transfer data within components of a one processor system. Prior to the present invention, no system has been devised for transferring data between processors on a DMA basis.
In transferring data on a DMA basis between independent processors, the most important advantage over byte-by-byte transfers is greatly increased speed.
In transferring data, any amount of data can be accessed by DMA operations. If memory accessing is done by a processor instead of a DMA controller, certain overhead operations are required. For example, in transferring data from one processor's memory to another memory, the first processor would have to map the other processor's memory into the initiating processor's memory. The first processor determines the address in the memory from which data is to be accessed and also stipulates the number of bytes of data to be transferred. A memory read cycle is then performed and the data is stored in a temporary register. The data is read from the temporary register and written into the destination memory. While this procedure is being performed on a byte-by-byte basis, the address register is incremented while the word count register is decremented. The values of these two variables are tested every machine cycle. In DMA operations, however, the same function is performed but without the necessity of using the processor to keep track of the status of these variables. In other words, the memory transfer operation is done independently of the processor and transparently thereto.